CPLD (Complex Programable Logic Device) is a complex user programmable logic device. Using a continuous connection structure, the delay can be predicted, so that the circuit simulation is more accurate. CPLD is a standard large-scale integrated circuit product that can be used in the design of various digital logic systems. The development tools Quartus II, ISE, etc. are powerful, and the programming language is flexible and diverse, which shortens the design and development cycle.
With the development of embedded, the requirements for data transmission and human-computer interactive communication are getting higher and higher. Serial communication is widely used because of its low resource consumption and mature technology. The interactive communication between the host computer and the embedded chip in the system can be used as a peripheral RS-232 asynchronous serial interface through a dedicated integrated chip, such as TI, EXAR, EPIC 550, 452 and other series UAWT integrated circuits, or have Nios The UART module can be easily embedded on the FPGA of the system. However, in the design, users will put forward their own requirements, such as: data encryption or only use part of the UART function, which requires a more flexible UART. And sometimes CPLD resources remain, for cost considerations will also require the design of an analog UART. For the above two situations, you can make a UART on CPLD's rich resources to realize the data exchange between the PC and the embedded system.
1 Serial communication protocol
1.1 Introduction to UART
Universal asynchronous receiver (Universal AsynchrONous Receiver Transmitter, UART). The characteristics of asynchronous communication: the strict consistency of the clocks of the sending and receiving parties is not required, the implementation is easy, and the device overhead is small. It has the advantages of standard interface level specifications provided by relevant industrial standards, and is widely used in the field of industrial control.
A frame of character information in asynchronous communication is composed of 4 parts: start bit, data bit, parity bit and stop bit.
This design is based on the data frame structure of RS-232. Set the data frame structure as shown in Figure 1: 1 bit start bit, 8 bit data bit, 1 bit stop bit, no parity bit. Each frame essentially transmits 1 Byte of data.
1.2 Custom data packet format
Multiple frames described above can form a data packet. Serial communication is defined on the basis of the RS-232 data frame structure, and transmission is performed in units of data packets. The package structure is shown in Figure 2.
This article adopts the structure of checksum. A data packet contains 15 bytes. The first byte is the header of the data packet, which is the handshake character. The second byte is the control character, EE stands for write command, DD stands for read command. The 3rd to 14th are available data. The 15th byte as a check character should theoretically be equal to the last 8 bits of the sum of the data strings in this packet.
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