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With the improvement of people's quality of life requirements and the global anti-terrorism trend, as well as the continuous advancement of digital technology itself, biometric identification programs and video surveillance solutions relying on fingerprint recognition, iris recognition, face recognition and other technologies are gradually improving. An important means of personal, family, business and social security. The biometric identification scheme mainly includes four steps: image acquisition, image preprocessing, feature sampling, and matching analysis. The video surveillance scheme mainly includes image acquisition, image preprocessing, image processing and transmission, image display, and image management. It is not difficult to see that image preprocessing is required for both biometric and video surveillance. In fact, the flexibility, complexity, occupation of image processing chip resources, and processing time length of the image preprocessing algorithm will directly affect the operation of the entire system. Therefore, image preprocessing is an arduous and critical task for the entire security solution, which directly determines the accuracy and convenience of subsequent image processing and analysis.
Image preprocessing analysis
According to different purposes, image preprocessing can be divided into clearing the acquired image, pre-processing before the image is recognized, and pre-processing before compressing the image. Among them, the clear processing of the collected image mainly includes subsequent correction of the inconsistency of the photosensitive unit of the CMOS or CCD image sensor, the difference compensation between the actual environment and the image collected by the sensor (such as backlight), and the removal of the original image collected. Noise processing, etc. Although the preprocessing algorithm itself is not difficult, with the popularity of real-time requirements, especially when the pixels are large, this algorithm puts high demands on the processing power of the DSP.
The pre-processing of the image before recognition is very strong, and it may be necessary to destroy the original pixels and distribution for subsequent feature extraction. The difficulty of this preprocessing algorithm varies depending on the occasion of the recognition. To synthesize the latter part of the recognition algorithm, select the appropriate DSP. The pre-processing before image compression mainly refers to changing YUV422 to YUV420, RGB to YUV, and the like. Such processing often has real-time requirements. If implemented by software, it will have higher processing performance. If hardware implementation is used, although the processing performance is guaranteed, the hardware cost will increase.
At the same time, according to different applications, image preprocessing can be divided into image preprocessing in image recognition and image preprocessing in video surveillance applications. For biometric applications, fingerprint recognition is taken as an example. The preprocessing mainly includes fingerprint image enhancement, fingerprint image binarization, fingerprint image refinement, and fingerprint image refinement. Image preprocessing in video surveillance applications mainly refers to the analysis of continuous images output by image sensors, obtaining sufficient information, and through automatic white balance, gamma correction, auto focus, auto exposure, backlight compensation, etc. Improve the actual effect of the image.
Image preprocessing challenge
Whether it is biometric or video surveillance, its image preprocessing is facing the following challenges: First, the user's image quality requirements are getting higher and higher, the image preprocessing algorithm is more and more complex, and thus the image preprocessing main chip processing capability. And the storage space puts forward more demanding requirements; secondly, the user has higher and higher requirements for real-time processing and transmission of images. On the one hand, the image pre-processing algorithm is required to be optimized and streamlined, and on the other hand, the image pre-processing main chip is also applied. Kernel processing power, internal bus architecture, data transfer capability, peripheral interface, and hardware architecture and instruction set support higher requirements for preprocessing algorithms; third, different from image and video codec algorithms have industry-wide Algorithm standard and clear evolution roadmap, image preprocessing algorithm not only has no unified standard and clear development direction, but even to a large extent, the solution provider uses these "secret" personalized algorithms as the market competition. magic weapon. In addition, with the different application fields, the increasing demand and the evolution of the technology itself, the original algorithm will be continuously upgraded, and new algorithms will emerge continuously, which require the image preprocessing chip to have higher flexibility and adaptability. Fourth, for the solution provider, not only does its core algorithm that reflects competitiveness need to prevent illegal reading or copying, but whether it is biometric or video surveillance, its image data often involves privacy, so it also needs to provide trust. Security guarantee. Both of these aspects require that the image processing chip must provide a reliable and complete processing platform.
Based on the above challenges, the traditional MCU with long control capability is not suitable for large and complex algorithm processing. The ASIC has certain advantages in terms of computing speed and power consumption, but its High cost, poor flexibility, and not conducive to upgrades and modifications, so can not meet the flexibility requirements of the pre-processing algorithm personalized; FPGA parallel processing architecture has powerful data processing capabilities, but the price, power consumption, and development difficulty The shortcomings make it difficult to become the mainstream choice for image preprocessing; while DSP has become the mainstream choice for image preprocessing main chip with powerful data processing capability and software programmability. In addition to the above challenges, from the perspective of system design, there are also the following requirements: First, although image preprocessing and image processing work is huge, engineers do not want to use multiple chips to handle this matter. Because the traditional DSP architecture of signal processing and control systems running on different processors has already caused engineers a lot of headaches, if the image preprocessing and image processing are separated, the difficulty of system development, system joint debugging, and system maintenance is even greater. . Therefore, for the main chip DSP in the system design, it also faces the requirement of integration - whether it is possible to implement image preprocessing, image processing, and even system control on a single chip.
Second, as the complexity of the entire image processing algorithm, including preprocessing, continues to increase, the DSP as the main processor, in addition to providing sufficient hardware processing power, should also be provided on the software specifically for the processor. Optimized instruction set to help engineers reduce the familiarity of the processor's physical architecture, maximize control, and exploit the characteristics of the processor, and develop a streamlined and optimized image processing algorithm as soon as possible.
Third, in addition to the specifically optimized instruction set mentioned above, in the face of increasingly complex image processing and time-to-market pressures, engineers also expect processor vendors to share some of their work – for example, to provide Processor-optimized, low-level image processing software modules that occupy a very small number of clock cycles to help them shorten the image processing algorithm development process and accelerate software migration.
In addition, powerful, user-friendly, and easy-to-learn development tools are also the focus of engineers' requirements in system development, and as system complexity and module reusability requirements increase, so does the development tool compatibility. .
Ideal DSP processor
Based on the above analysis, the ideal DSP processor for image processing applications must have the following characteristics: strong kernel processing capability; instruction set specifically for image processing; low-power hardware architecture that is easy to transfer large amounts of data; high integration; rich Software module library; a powerful development tool. The following is a detailed analysis of the Blackfin convergence processor architecture, a representative series of DSP processors.
Hardware Features The Blackfin DSP processor is based on the Micro Signal Architecture (MSA) jointly developed by ADI and Intel Corporation. It combines the advantages of traditional DSP and microcontrollers with event control and pure arithmetic processing. Its single core provides up to 756MHz of processing power, providing powerful performance guarantees for handling complex pre-processing algorithms, and powerful hardware support for image processing and event control for the entire system, allowing engineers to Image preprocessing, image processing, and system control are implemented on the chip, which greatly improves the integration of the system.
The hardware architecture of the Blackfin family of processors is optimized for image processing. Multiple DMA channels and flexible Caches are ideal for image processing applications with high computational throughput and high data throughput. In image processing applications, although the transfer of image data can also be implemented by software, this consumes a large amount of CPU clock cycles, making the DSP's high-speed data processing capability difficult to play. If the DMA is solely responsible for data transfer, then after the system kernel initially sets and starts the DMA, the DMA controller can directly transfer the image data from the PPI interface to the SDRAM memory for storage without kernel involvement, such as in progress. In a computationally intensive algorithm for MPEG or JPEG processing, a flexible DMA controller can eliminate additional data paths. In addition, two-dimensional DMA can also simplify the transfer of macroblocks into and out of the external memory, allowing data control to be part of the actual transfer of data, which is very convenient and important for the intersection and intersection of color space elements. Therefore, this feature of the Blackfin processor effectively solves the speed bottleneck of high-volume image data transmission, and allows the DSP processor to extract more resources for algorithm processing, which greatly improves the processing power of the system.
Moreover, for image processing applications, Blackfin series DSPs continue to enhance the support of hardware function modules. For example, the latest version of the ADSP-BF54x series Blackfin processor adds a hardware accelerator for processing Pixel Compositor and a Extended Video Interface (EPPI), which enables tasks such as color space transformation, scaling, and image overlay to be performed without the need for the processor to participate in the computation, thereby reducing the processing power of the kernel for higher performance, higher speed images Processing provides more space.
Software Features In terms of instruction sets, the Blackfin family of DSPs provides a rich set of vector and video instructions for image processing. The vector instruction can implement 16-bit operations (most instructions can perform two 16-bit operations in parallel). Since image processing operations are mostly for 16-bit operations, it is important to optimize image operations by properly using these vector instructions. Not only most of the arithmetic instructions and shift instructions in the Blackfin instruction set have corresponding vector instructions, but also vector instructions include special instructions based on symbol addition, 32-bit to 16-bit number. Appropriate application of these vector instructions in the assembly optimization of image preprocessing can improve the parallelism of the algorithm and greatly speed up the operation.
Video pixel instructions mainly include BYTEOP16P (complete two 8-bit addition operations), BYTEOP3P (complete 16-bit and 8-bit addition operations), BYTEOPIP (complete two 8-digit averaging operations), BYTEOPZP (complete four 8 Bit number averaging operation), BYTEOP16M (complete two 8-digit subtraction operations), SAA (complete SAD operation), BYTEAPCK (complete 16-bit to 8-digit operation), and BYTEUNAPCK (8-bit to 16-bit completion) Number of operations) and so on. A video pixel operation instruction can complete, add, subtract, add, subtract, and average four pairs of video data components in one cycle, or subtract and find absolute values ​​such as 11 kinds of video pixel operations. Since video pixel values ​​are generally stored in 8 bits, the use of video pixel instructions can greatly increase the speed of various video image operations including SAD, pixel interpolation, 8-bit and 16-bit direct conversion.
Security Features In terms of security, Analog Devices' Blackfin Lockbox Secure Technology combines software and hardware protection by providing one-time programmable (OTP) memory and secure processing mode (Blackfin security mode) to provide developers with the above security measures. Means, where a public, non-secure, user-programmable area developer in the OTP memory can be used to store the public key so that the system can be authenticated in a controllable and configurable manner. In the private, secure, user-programmable area of ​​OTP memory, developers can set up private device assets such as private keys and maintain the confidentiality and integrity of these device assets. In addition, after using the security mode on the Blackfin processor, the processor can only perform authorized trust coding within the secure processing environment. Includes protection of secrets (such as original equipment manufacturer intellectual property), verification of device and user identity to protect e-commerce and social networks, and digital rights (DRM) content protection. This provides tailored security protection for all aspects of the image pre-processing solution.
Software module library support
In addition to the Blackfin DSP's support for image processing in terms of hardware architecture and instruction set, Analog Devices offers a variety of software modules for image processing, including the H.264 Baseline Profile Decoder module, which scales with different input and output sizes. Image Enhanced Video Post Processing (eVPP) Module, JPEG Encoder Module MPEG-2 Decoder Simple & Main Profile Decoder Library, MPEG-4 Simple Profile & Advanced Simple Profile Decoder Library, and MPEG-4 Simple Profile & Advanced Simple Profile Video Encoder Modules, etc., are optimized for Blackfin processors and are rigorously verified by the industry. These software modules significantly reduce the development of system engineers and significantly increase system efficiency.
In addition, Analog Devices has introduced the "Image Tool Box" software package for image processing applications. The software package consists of a series of dedicated modules and is optimized for some common and basic functions of image processing algorithms for image transformation. Image processing operations such as image analysis and image enhancement, binary image manipulation, and morphological processing. This software package helps reduce the development difficulty of engineers and accelerate the implementation and optimization of upper algorithms.
Development environment support
The VisualDSP++ development environment for Blackfin series DSP processor development applications and project management mainly includes integrated compilation and debugging environment (DIDE) integrated with ViusalDSP++ kernel; CC/++ optimized compiler with real-time runtime library; assembler and linker , as well as simulation software and program routines. Among them, the compiler allows program developers to write signal processing and control code in C or C++ language, which facilitates system development and maintenance. The graphical, user-friendly information exchange interface enables engineers to manage, edit, compile, and debug programs in windows and quickly and easily switch between them. In addition, VisualDSP++ development tools are compatible with Green Hills Software's MULTI environment, NI LabVIEW software, and MathWorks' MATLAB and Simulink software, providing a more convenient and relaxed environment for system development and module reuse.
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