How many types of interconnections does the Wishbone specification support?

Figure 1 The main signals used in the Wishbone bus specification (an example of point-to-point interconnection)

A special application of point-to-point interconnection is that when data needs to be processed in multiple steps in sequence, multiple modules with both a master device interface and a slave device interface are connected in series, as shown in Figure 2. This type of connection is also called a data stream connection. Module A sends the processing result to module B after processing the data, and module B sends the processing result to module C for processing after processing the data sent by module A. Data is sent from one module to another, and this processing method is often referred to as pipelining. Pipeline is very important in processor design. Its advantage is that multiple data can be processed in parallel, thereby improving the overall data processing capability of the system.

Figure 2 Data flow interconnection

The shared bus interconnection mode is shown in Figure 3. The shared bus interconnection method is suitable for situations where there are two or more master devices in the system that need to communicate with one or more slave devices. They communicate through a shared bus. The advantage is that the structure is compact and the wiring resources are saved. The disadvantage is that the master device You may need to wait when you want to communicate with a specific slave device. When the master device needs to communicate with a slave device, it needs to apply to the arbiter (not shown in the figure) for bus ownership. After obtaining permission, it starts to occupy the bus and start communication with the target slave device. After the communication ends, the bus is released. When multiple masters want to occupy the bus at the same time, the arbiter allocates bus usage opportunities through a certain priority logic.

The shared bus interconnection method has been widely used in the system-on-chip and has almost become one of the signature technologies of the system-on-chip. Shared bus technology has also been applied in board-level systems such as PCI bus.

Figure 3 Shared bus interconnection mode

The cross interconnection method is slightly more complicated than the shared bus interconnection method. The shared bus interconnection method allows only one pair of master and slave devices to communicate through the shared bus at any one time, while the cross interconnection method allows at most more than one pair of master and slave devices to communicate at the same time, as shown in Figure 4. . Of course, in the cross interconnection mode, a slave device can only communicate with one master device at any time, and two master devices cannot access the same slave device at the same time.

Figure 4 Cross-interconnection mode (the dotted line in the figure represents a possible communication mode)

Similarly, the interconnection based on the switching structure is more complicated than the INTERCON module of the cross-interconnection mode. Generally, the interconnection based on the switching structure allows more master-slave devices to communicate simultaneously than the cross-interconnection.

With the development of technology, network on chip technology (Network on chip) that is more complicated than on-chip bus has emerged. Based on the on-chip network technology, chips containing dozens of 32-bit processors have appeared, and they have been used in CISCO's high-end routers.

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